Semiconductor device and method of manufacturing same

ABSTRACT

In an example embodiment, the semiconductor device comprises a carrier and a semiconductor element, such as an integrated circuit. The carrier is provided with apertures, thereby defining connecting conductors having side faces. Notches are present in the side faces. The semiconductor element is enclosed in an encapsulation that extends into the notches in the carrier. As a result, the encapsulation is mechanically anchored in the carrier. The semiconductor device can be made in a process wherein, after the encapsulating step, no lithographic steps are necessary.

The invention relates to a semiconductor device comprising a carrierwith a first and a second side situated opposite to each other, whichcarrier has a first electroconductive layer on the first side, whichelectroconductive layer is patterned in accordance with a desiredpattern, thereby defining a number of mutually isolated connectionconductors, on which first side of the carrier a semiconductor elementis present, which semiconductor element is provided with connectionregions that are electroconductively connected via connection means withthe connection conductors of the carrier, which semiconductor element isencapsulated in a passivating envelope that extends as far as thecarrier, on which second side, contact surfaces are defined in theconnection conductors for placement on a substrate.

The invention also relates to a method of manufacturing a carrier havinga first and a second side situated opposite to each other, which carriercomprises, on the first side, a first electroconductive layer that ispatterned in accordance with a desired pattern, thereby defining anumber of mutually isolated connection conductors, which carrier furthercomprises a second and a third layer.

The invention further relates to a method of manufacturing a number ofsemiconductor devices, which each comprise a semiconductor element withconnection regions, which method comprises the following steps:

-   -   providing the semiconductor element on the first side of a        carrier, an electroconductive connection being formed between        the connection regions and the connection conductors of the        carrier by means of the connection means;    -   providing a passivating envelope; and    -   separating the semiconductor devices.

Such a semiconductor device, and such methods, are known from EP-A1160858. The carrier of the known semiconductor device is produced byetching from the first side as far as halfway down said carrier. Theresulting connection conductors extend such that a part thereof iscovered by the semiconductor element and another part is not. Theuncovered part is provided with an additional conductive film, enablingbonding wires to be attached. These bonding wires are the connectionmeans between the semiconductor element and the connection conductors.For defining the contact surfaces a mask is provided, as shown in FIG.4C of the prior-art document, after which the carrier is etched to acertain depth. The known carrier comprises three layers of the samematerial, for example copper, aluminum or a nickel-iron alloy, but mayalternatively comprise aluminum, copper and aluminum as the layers.

A drawback of the known semiconductor device resides in that theadhesion of the envelope to the carrier is insufficient.

Therefore it is a first object of the invention to provide asemiconductor device of the type mentioned in the opening paragraph thathas an improved adhesion between carrier and envelope.

The first object is achieved in that the envelope of the semiconductordevice is mechanically anchored in the connection conductors, for whichpurpose the connection conductors are provided with side faces havingrecesses.

The mechanical anchoring obtained in the semiconductor device inaccordance with the invention provides for good adhesion between theenvelope and the carrier. In addition, this mechanical anchoring can bereadily obtained, for example, because in addition to the first layer,the carrier comprises a second layer and a third layer, the second layercomprising a material that can be etched in an etchant that leaves thefirst and the third layer substantially in tact.

For the connection means use can be made of bonding wires; if bondingwires are used, the semiconductor element is attached to the carrier bymeans of an adhesive. Alternatively, use can be made of anisotropicallyconductive adhesive, bumps or solder. These connection means have theadvantage, in comparison with bonding wires, that no or few assemblyoperations are necessary. In particular bumps are suitable because bumpsmade of, for example, gold or a gold alloy can be placed very accuratelyand do not cause contamination of the connection regions of thesemiconductor element.

In a favorable embodiment the first and the third layer of the carriercontain Cu, while the second layer contains aluminum or a nickel-ironalloy. Alternatively, the first and the third layer may contain anickel-iron alloy and the second layer may contain copper. It isconsidered less suitable if the first and the third layer are made ofaluminum; aluminum has the disadvantage that wire bonding and plating onaluminum yield less favorable results. A three-layer carrier has theadditional advantage over a two-layer carrier that warpage of thecarrier as a result of a heating step is precluded.

In another embodiment, the carrier comprises electrically insulatinglayers, electroconductive connections being realized, by means of vias,from the first side to the second side of the carrier. Such anembodiment of a multilayer substrate is favorable, in particular, ifpassive components can be embedded in these layers. Examples of suitableelectrically insulating layers are, inter alia, epoxy and silicon oxide.

The semiconductor element is preferably an integrated circuit but mayalternatively be a discrete semiconductor. It is additionally possiblethat as well as the semiconductor element, one or more other elementsare present on the substrate. These other elements may be active andpassive elements.

It is a second object of the invention to provide methods ofmanufacturing a carrier and a number of semiconductor devices of thetype mentioned in the opening paragraph, by means of which asemiconductor device with improved adhesion is obtained.

The second object is achieved in that the second layer is etched in anetchant that leaves the first layer and the third layer substantially intact, said etching leading to underetching of the first layer, resultingin the formation of recesses in the connection conductors.

The third object is achieved in that the carrier that can be obtainedusing said method in accordance with the invention is used, and thepassivating envelope is provided such that said envelope extends intothe recesses defined in the carrier.

The semiconductor device in accordance with the invention is obtained ina simple manner using said method. A favorable aspect of the method inaccordance with the invention is that it is not necessary to carry out alithographic step after the semiconductor elements have been enveloped.This advantage can be realized in various ways.

In a first embodiment the pattern in the first layer is defined by meansof punching, whereby apertures are formed that extend from the firstside to the second side of the carrier. The connection conductors remainconnected to a framework in the carrier by means of leads. By virtue ofthe definition of the apertures, patterning of the third layer of thecarrier can be dispensed with. The second layer can be favorably etchedin a wet-chemical process, wherein the carrier is immersed in a bathcontaining the etchant. When the carrier is subsequently used tomanufacture the semiconductor device, said carrier is placed on asubstrate when the encapsulation is provided. In the separating process,the leads between the connection conductors and the framework are cutthrough.

This embodiment has several important advantages for industrial-scalemanufacture. First, this carrier can be processed in the same way as astandard carrier made of a single layer of copper. At the same time, thesemiconductor device thus obtained is better because said device isthinner and does not have laterally projecting leads for attaching to asubstrate. Second, the bath containing the etchant for the second layer,in this case, for example, aluminum or a nickel-iron alloy, can be addedto one or more baths that are used already for the manufacture of thecarrier. These baths are used to provide an NiPd(Au) layer on the firstside of the carrier by means of plating. This has the advantage that thebonding wires can be excellently attached thereto. However, such anadhesive layer may also be provided in a different manner.

The carrier in accordance with this embodiment preferably has athickness between 0.05 and 0.2 mm, and preferably comprises a first anda third layer of copper and a second layer of aluminum or a nickel-ironalloy; the layer thicknesses of the first, second and third layer are ofthe same order of magnitude.

The layers of the carrier, and particularly the second layer may containany addition or impurities, such as in the case of AC, SI an d/or Cu.

To manufacture the semiconductor device with the carrier in accordancewith this embodiment, conductive wires are used as connection meansbecause it has been found the currently available techniques do notpermit said carrier to be combined with bumps or anisotropicallyconductive adhesive. Besides, in the case of bumps or an anisotropicallyconductive adhesive, one or more surfaces are defined in the carrier, onwhich the semiconductor element can be attached by means of adhesive.This surface or these surfaces also serve as a heat sink.

In a second embodiment the carrier is provided on the second side withan etch mask that is resistant to a heat treatment. Prior to theprovision of the semiconductor element and the encapsulation, the firstlayer and the second layer are patterned from the first side by means ofetching. The third layer remains in tact, so that the carrier does notdisintegrate. After the semiconductor element has been placed andencapsulated, the third layer or at least the surface thereof ispatterned by means of the etch mask. In this manner, electroconductivecontact surfaces are defined at the surface of the third layer.

These and other aspects of the semiconductor device and the methods ofmanufacturing the carrier and the semiconductor device in accordancewith the invention will be explained in greater detail with reference tothe drawings wherein:

FIG. 1 is a diagrammatic cross-sectional view of a first embodiment ofthe semiconductor device;

FIG. 2 is a diagrammatic cross-sectional view of a second embodiment ofthe semiconductor device;

FIG. 3 is a diagrammatic plan view of the second embodiment;

FIG. 4 is a diagrammatic cross-sectional view of a third embodiment ofthe semiconductor device; and

FIGS. 5–9 show steps in the methods of manufacturing the carrier and thesemiconductor device.

The Figures are not drawn to scale. Like reference numerals refer tolike parts. Alternative embodiments are possible within the scope ofprotection of the appended claims.

FIG. 1 is a diagrammatic cross-sectional view of a semiconductor device10. Said semiconductor device 10 comprises a semiconductor element 20that is present on a carrier 30. Said carrier 30 has a first side 1 anda second side 2 and comprises a number of connection conductors 31, 32,33. Said connection conductors 31, 32, 33 having side faces 3 aremutually isolated by apertures 15. Between the connection conductors 31,32, 33 and connection regions 21 in the semiconductor element 20 thereare connection means, in this case bonding wires 22. In this example,the semiconductor element 20 is attached to the first side 1 of thecarrier 30 by means of an adhesive layer 23. The semiconductor element20 and the bonding wires 22 are encapsulated by an envelope 40. Thisenvelope 40 extends into the apertures 15 of the carrier 30.

In accordance with the invention, recesses 16 are present in the sidefaces 3 of the connection conductors 31, 32, 33. These recesses 16 arefilled with the envelope 40, as a result of which the first layer 31 ispartly clamped by the envelope 40. This ensures that the envelope 40 ismechanically anchored in the carrier 30, leading to excellent adhesionand mechanical strength. In this case, adhesion-improving means do nothave to be provided on the first side 1 of the carrier. The first side 1can also be optimized for the placement of the semiconductor element 20and the bonding wires 22.

In this embodiment, the carrier 30 is composed of a first layer 11, asecond layer 12 and a third layer 13. The first layer 11 and the thirdlayer 13 comprise mainly copper, and the second layer 12 comprisesmainly aluminum. The recesses 16 in the second layer 12 are formed bymeans of etching, as will be explained with reference to FIGS. 5–9. Thecarrier 30 further comprises a top layer 14 on the first side 1 ofNiPdAu or NiPd. This top layer 14 is desirable for a good adhesion withthe bonding wires 22. As will be understood by persons skilled in theart, the top layer 14 may also comprise a different suitable material.The third layer 13 is patterned so as to form contact faces by theopenings 15 which extend as far as the second side of the carrier 30.The connection conductor 32 is connected to ground and serves as a heatsink.

FIG. 2 is a diagrammatic cross-sectional view of a second embodiment ofthe semiconductor device 10. FIG. 3 is a diagrammatic plan view of thesecond embodiment, wherein the line A—A indicates the cross-section ofFIG. 2. The semiconductor device comprises a carrier 30 with a firstlayer 11, a second layer 12, a third layer 13 and a top layer 14. Thecarrier 30 is patterned from the first side, in which process apertures15 and connection conductors 31–35 are formed. This is achieved by meansof etching of, in succession, the first layer 11 and the second layer12, thereby forming the recesses 16 in the side faces 3 of theconnection conductors 31–35. Subsequently, the semiconductor element 20with connection regions 21 is connected to the connection conductors31–35 by connection means 22, in this case bumps of Au. For this purposeuse is made of a flip-chip technique. To provide for good contact, thetop layer 14 of Sn is provided on the first layer 11 of Cu. Subsequentlythe envelope 40 is provided. This results in mechanical anchoring sincethe envelope 40 extends into the recesses 16 of the carrier.Subsequently the third layer 13 is patterned by means of an etch maskthat is already present, in particular an epoxy material as is also usedin laminates. Next the etch mask is removed, as a result of which theapertures 15 extend from the first side 1 to the second side 2 of thecarrier 30. The apertures 15 are subsequently also used to separate thesemiconductor devices 10. This has the additional advantage that themechanical anchoring substantially encapsulates the connectionconductors 31–35. The size of the semiconductor device 10 is, forexample, approximately 1×1 mm. The opening 16 has a width of, forexample, 40–100 μm. The thickness of the first, second and third layer11–13 is chosen to be 30 μm, 40 μm and 30 μm, respectively.

FIG. 4 is a diagrammatic cross-sectional view of a third embodiment ofthe semiconductor device 10. The third embodiment largely corresponds tothe second embodiment. The difference between the embodiments relates tothe carrier 30 which, in the case of the third embodiment, comprises apassive component 172. For this purpose, the carrier 30 comprises, inaddition to the first, the second and the third layer 11, 12, 13 whicheach contain electroconductive material, a fourth layer 17 ofelectrically insulating material and a fifth layer 18 ofelectroconductive material. The fourth layer comprises parts 171 inaccordance with a desired pattern, which parts contain a dielectricmaterial having a high dielectric constant, for example a material onthe basis of barium titanate with a specific composition known topersons skilled in the art. This material is present, for example inpowdered form, in the fourth layer 17 which additionally contains, forexample, an epoxy material. In this case the passive components 172 arecapacitors, but said components may alternatively be resistors or coils.In accordance with the diagrammatic Figure, the passive components 172are arranged in series between the contact surfaces 18 and thesemiconductor element 20. However, this is not necessary. Instead of thecarrier 30 shown here, which is based on laminate or ceramic material,the carrier 30 may alternatively be a passive network for example on asilicon substrate.

FIGS. 5–9 show various steps in the methods in accordance with theinvention, which lead to the first embodiment of the semiconductordevice 10, as shown in FIG. 1. FIGS. 5, 6 and 7 relate to the method ofmanufacturing the carrier 30. FIGS. 8 and 9 relate to the method ofmanufacturing semiconductor devices 10. The methods shown here have theadvantage that they can be carried out without a lithographic step beingrequired after the envelope has been provided, while at the same timethe adhesion to the envelope 40 is excellent and the carrier 30 does notdisintegrate prior to the enveloping step.

FIG. 5 shows the carrier 30 after a first step wherein a first layer 11of Cu, a second layer 12 of Al and a third layer 13 of Cu are adhered toone another. It is possible to use the second layer 12 as the startinglayer and provide a layer of Cu on either side thereof. Alternativelythe carrier 30 can be formed by rolling together the layers 11, 12, 13,which technique is customarily used to form bilayers. Said process canalso be carried out in two steps. It is also possible that eventually afour-layer or multilayer carrier is formed. The first, second and thirdlayers 11, 12, 13 had a thickness of 70 μm in a first experiment. Thethickness may vary however between 1 μm and 1.0 mm, preferably between10 to 50 μm and the thicknesses of the first, second and third layers11–13 do not have to be the same. If the first layer 11 is comparativelythin, the material that is preferably used for this layer has a largemechanical strength and rigidity, such as a nickel-iron alloy. Incombination therewith, copper can be used for the second layer 12.

In order to improve the adhesion of the Cu and AL layers to each other,a heating step may be done after lamination of the layers. Such aheating step leads to diffusion of Cu atoms into the AL, therewithcreating sublayers of an AL-Cu alloy.

FIG. 6 shows the carrier 30 after apertures 15 extending from the firstside 1 to the second side 2 of the carrier 30 have been provided bymeans of punching. As a result of this punching operation, theconnection conductors 31–33 having side faces 3 are defined. Theconnection conductors are connected in a customary manner to a frameworkin the carrier by means of leads that are not shown.

FIG. 7 shows the carrier 30 after it has been treated in a number ofbaths; the carrier 30 is first treated in a bath comprising aconcentrated KOH solution for 3 minutes. In which process the secondlayer 12 of Al is etched, thereby forming recesses 16. The concentrationof this etching solution is for instance 0.1 to 2 mole per liter.Preferably, a soluble ferricyanide is part of the etching solution aswell, in a concentration in the range of sf/e up to saturation. It iseven more preference that a soluble salt of a phosphorus aid devicedfrom trivalent or pentavelent phosphorus oxide is present as well. Suchan addition can be used to set the desired amount of undercutting.

After said three minutes, the recesses had a width of 70 μm. However, awidth of 10–20 μm is sufficient to obtain the desired mechanicalanchoring. In addition, such a width has the advantage that theconnection conductors can be miniaturized; for a connection conductorhaving a width of approximately 100 μm, wherein recesses 16 are providedat two side faces 3, the width of the recess can be approximately 30 μmat the most. Subsequently, the carrier 30 is treated in a bath in whicha top layer 14 of NiPd is applied to the first side 1 of the carrier.The concentration of the etchant and the temperature of the etching bathcan be adjusted. These are determined, in particular, by the velocitywith which the carrier 30 moves through the bath used to apply the NiPdtop layer 14.

FIG. 8 shows the carrier 30 after semiconductor elements 20 are adheredto the carrier by means of an adhesive 23 and bonding wires 22 areprovided between the connection regions 21 of the semiconductor elements20 and the connection conductors 31–33.

FIG. 9 shows the carrier 30, which is temporarily placed on a substrate70, after the envelope 40 has been provided in a customary manner.

1. A semiconductor device comprising a carrier with a first and a secondside situated opposite to each other, which carrier has a firstelectroconductive layer of the first side, the first electroconductivelayer is patterned in accordance with a desired pattern, therebydefining a number of mutually isolated connection conductors separatedby apertures, on which first side of the carrier a semiconductor elementis present, which semiconductor element is provided with connectionregions that are electroconductively connected via connection means withthe connection conductors of the carrier, which semiconductor element isencapsulated in a passivating envelope that extends as far as the secondside of the carrier, but does not cover the second side of the carrier:on which second side, contact surfaces are defined in the connectionconductors for placement on a substrate, characterized in that theenvelope is mechanically anchored in the connection conductors, forwhich purpose the connection conductors are provided with side faceshaving recesses.
 2. A semiconductor device as claimed in claim ,characterized in that, in addition to the first layer, the carriercomprises a second layer and a third layer, the second layer comprisinga material that can be etched in an etchant that leaves the first andthe third layer substantially in tact.
 3. A semiconductor device asclaimed in claim 2, characterized in that the first and third layercontain copper, and the second layer contains a material selected fromthe group composed of Al and Ni—Fe.
 4. A semiconductor device as claimedin claim 1, characterized in that the apertures extend as far as thesecond side of the carrier.
 5. A semiconductor device as claimed inclaim 1, characterized in that the connection means are bumps, whichbumps are also used to attach the semiconductor element onto thecarrier.
 6. A semiconductor device as claimed in claim 1, characterizedin that the carrier comprises a number of electrically insulating andconductive layers, at least one passive component being embedded in saidlayers.
 7. The semiconductor device of claim 1, further comprising asubstrate upon which the second side of the carrier is disposed.